1. Technical Field
This invention relates to a programmable controller, and in particular relates to a programmable controller which simplifies debugging of a user program which includes an interlock command.
2. Background Of the Invention
As is per se known, programmable controllers may be classified into those of the relay ladder diagram type and those of the flow chart type.
In such a programmable controller, an interlock command and an interlock clear command are defined as two possible forms that may be taken by the user commands, and there is provided an interlock processing function which prohibits the output of the group of execution commands interposed between the interlock command and the clear command, depending on whether the conditions for the interlock are satisfied or not. If more details are required about this per se known function, reference should be made to the various catalogs published by the assignee of the Japanese patent application Ser. No. 59-117253 (1984) the priority of which is being claimed in the present patent application, and in particular to page 10 of "Programmable Controller SYSMAC" published in August 1983, and to page 50 of "Programmable Controller SYSMAC M1R", published in January 1983.
An example of a program including such an interlock command is shown in FIG. 7(A) of the accompanying drawings in terms of a relay ladder diagram to which the program serves as a source program, while FIG. 7(B) is a program listing showing the same program in the form of an object program written in mnemonics, and FIG. 8 is a cross reference table of said program.
In these figures, "IL" refers to an interlock command, while "ILC" refers to an interlock clear command. In this program, the IL command is set up in address 100, while the ILC command is set up in address 112, and the program A interposed between these commands is intended as an object for control for the interlock command.
Whether the interlock condition of the IL command in address 100 is satisfied or not is determined by whether, in FIG. 7(A), the logical OR of the contacts 51 and 53 ANDed with the contact 53 is unity or zero, In other words, when this logical result is unity, the interlock condition is not satisfied, and the OUT command and the MOVE commands in the program A are executed in the normal fashion. However, when this logical product is zero, the interlock condition is satisfied, and the program execution operation is switched over so as to prohibit the outputs included in the program A and to turn OFF all of them.
In such a programmable controller, there is provided a monitor function intended for program debugging on the part of the user.
Such a monitor function may be achieved in a number of ways, but in any case when a special user command which is to be monitored is determined and the user command executed, the monitor function transmits the control data such as the logical state of the I/O signal used and the user command, the numerical value data of the timer/counter if the user command is a timer/counter command, the logical state of the power flow register resulting from the logical computation executed by the command, and so on, relating to the execution of the user command, and displays them. As an example, when OUT (21) is OFF and its cause is to be investigated making use of such a monitor function, the user knows the logical state of the contact 50 affects the input condition of the OUT 21 by referring to the ladder diagram and the program listing shown in FIGS. 7(A) and 7(B) and to the cross reference list shown in FIG. 8, and makes entries into the program console using the address 95 as an object for monitoring.
Then, upon execution of the LD (50) command, the logical state of the contact 50 and the logical state of the power flow register upon execution of the command are transmitted to the program console as monitor data, and this is displayed.
By seeing this display, the user knows the reason why the OUT (21) is OFF, and can make appropriate corrections.
In monitoring output, corresponding commands such as OUT commands and MOV commands in the program A interposed by an interlock command, as shown in FIGS. 7(A) and 7(B), when the interlock condition is not satisfied, there is not problem, but when the interlock condition is satisfied and all the output signals of for instance the OUT commands in the program A are all OFF, then the following problem arises.
When an output inhibition by interlock is in effect, for instance even when the contact 57 is OFF or zero, the output 23 is OFF or zero. In such a case, in order to monitor the OUT (23) command and to find out the cause of the output signal 23 being OFF or zero, the monitor object addresses are decremented, and the LD NOT (57) command of the address 107 is monitored. At this time, if the logical state of the power flow register is zero upon execution of the LD NOT (57) command, one can see that the logical conflict between the LD NOT (57) command and the OUT (23) command is due to the interlock command.
Because it is not possible to determine from the monitor for what cause the output inhibition by the interlock has gone into effect, the cause can be known only after finding the IL command of the address 100 by sequentially decrementing the program address and monitoring the END (53) command of the address 99, the OR (52) command of the address 98, and the LD (51) command of the address 97, by decrementing the monitor object addresses.
Thus, it requires a considerable time interval for finding the cause of such a problem in debugging a user program including an interlock command, if it is performed only with a conventional monitor function. Particularly when the length of the user program interposed between interlock commands is long, or when a plurality of interlock commands are being used, considerable time is required for program debugging, and some improvement has been strongly desired.